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Thank you for your reply. A few more questions:
Is Dn a 128-bit wide register? Is Dd also a 128-bit wide register? (Referring to the diagram in the original question)
Also, the diagram shows 4 parallel operations. Is this the actual number of parallel operations that the hardware can execute?
As an example: If 4 parallel operations are executed, each operation would use 32-bits from each source register. Is this correct?
Hello,
D of Dn represents double (i.e. 64 bit).Also Qn represents quad (i.e. 128 bit).If you say about a source register by Dn, it can be both 64 bit or 128 bit (or 32 bit).If you say about a destination register by Dd, it can be both 64 bit or 128 bit (or 32 bit)..Please refer to ARM NEON programming quick reference .The parallelism of an operation would be 1, 2, 4 or 8.The unit of each operation depends on an instruction.
Best regards,Yasuhiko Koumoto.
Awesome. This clears up a lot of questions. Thank you very much!
Regards,
Kenrick