Arm Community
Site
Search
User
Site
Search
User
Support forums
Architectures and Processors forum
Will an outer non-cachable-write invalidate cacheline when hit in l2cache, with shared override bit set
Jump...
Cancel
State
Not Answered
Locked
Locked
Replies
0 replies
Subscribers
350 subscribers
Views
773 views
Users
0 members are here
Options
Share
More actions
Cancel
Related
How was your experience today?
This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion
Will an outer non-cachable-write invalidate cacheline when hit in l2cache, with shared override bit set
shch
over 2 years ago
A9, PL310 controller