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NEON SIMD Register Diagram

Hello,

I’m new to ARM architecture and was looking to get a better understanding of how it works. Most notably, the Cortex-A series and its DSP functionality.

When looking through the NEON SIMD page on ARM's webpage (NEON - ARM), it mentions that NEON technology has 32 registers, 64-bits wide OR "dual view as 16 registers,128-bits wide". Any clarification on what this means? (Or just dual view in general)

Looking at this photo/diagram below:

Diagram illustrating NEON packed SIMD processing

Does this accurately represent the NEON architecture? If so, does each source register consist of 32 registers? Or is it 32 registers split up between the source and destination registers?

Regards,

Kenrick

Parents
  • Hello,
    NEON register set consists of 16 x 128 bit wide registers (Qn) and each 128 bit wide register is divided into 2 x 64 bit wide registers (Dn). Also lower 16 x 64 bit wide registers are divided into 32 x 32 bit wide registers (Sn). Please see the below picture.

    Regarding NEON operation, you are right.
    The picture shows 2 source registers (i.e. Dn and Dm).
    There are one of 32 x 64 bit wide registers.
    Alos source register can be one of 16 x 128 bit wide registers.

    Best regards,

    Yasuhiko Koumoto.

Reply
  • Hello,
    NEON register set consists of 16 x 128 bit wide registers (Qn) and each 128 bit wide register is divided into 2 x 64 bit wide registers (Dn). Also lower 16 x 64 bit wide registers are divided into 32 x 32 bit wide registers (Sn). Please see the below picture.

    Regarding NEON operation, you are right.
    The picture shows 2 source registers (i.e. Dn and Dm).
    There are one of 32 x 64 bit wide registers.
    Alos source register can be one of 16 x 128 bit wide registers.

    Best regards,

    Yasuhiko Koumoto.

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