Does NIC-400/AXI provide full theoretical bandwidth or is there necessarily some inter-transaction gap due to the protocol or arbitrations delays or some such? That is would it be possible to overlap the, say, write address and write data between transaction without any gaps for full sustained bus utilization for a significant period of time?
No, the NIC-400/AXI protocol does not provide full theoretical bandwidth due to various factors such as protocol overhead, arbitration delays, and other factors that can introduce gaps between transactions. It may not be possible to overlap write address and write data between transactions without any gaps for sustained bus utilization. The actual sustained bandwidth would depend on the specific implementation and the characteristics of the transactions being performed.
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