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Hi, i have just got a cortex-m0(LPC1114) based dev board. I'm reading about the architecture and instructions. My understanding is that it supports most thumb 16-bit instructions and a handful thumb-2 32-bit instructions. If the processor has a 32-bit bus which instructions are fetched(im assuming this, also i have limited knowledge of a CPU's inner workings), why don't it support more thumb-2 instructions? It seems like a waste, or maybe it fetches two 16-bit instructions?
My other issue is related to to my first question. I'm trying to set the core registers with immediate values using MOV. I read that you can use MOV for the for the 16 lower bits, and MOVT for the 16 higher bit(this is only for cores which supports ARM32 i suppose). However first it seems MOVT is not supported by cortex-m0, in arm-none-eabi-as: "Error: selected processor does not support Thumb mode `movt r0 , r1'. Also when i read the ARMv6-M reference manual, i read that MOV can only set a immediate value up to 8-bits long. This all seems very strange to me. I got a hint on a IRC that your really supposed to use PC relative addressing to set registers "directly", which i haven't read much into. Are there no efficient way to set immediate 32-bit values for registers, using MOV or other data instructions?
Thanks for responses!
muffin wrote: Since the bus is 32-bit, are instructions fetched in pairs? If so, will a memory fetch occurs when the IF isn't using the bus be faster than when a collision occurs?
muffin wrote:
Since the bus is 32-bit, are instructions fetched in pairs? If so, will a memory fetch occurs when the IF isn't using the bus be faster than when a collision occurs?
Unfortunately it won't, as the instruction timing is fixed on the Cortex-M0.
The disadvantage is obvious, but there are two advantages to this:
1: The core will use less silicon space.
2: It's easier to calculate timings "by hand".