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Assembly encoding that triggers an exception in both the A32 and T32 instruction set

Rosario

All,

I am looking for a pattern that fetched by the Cortex-R52 triggers an exception in both cases: A32 and T32 instruction sets. Both A32 and T32 instruction sets implement the UDF instruction, but their encoding is different in the case of A32 and T32.

Does this pattern exist?

Thanks in advance,

  Rosario

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    Interesting question...

    Are you thinking about hitting this encoding as a branch target or from linear execution?

    I asm because T32 instructions can be either 16 or 32 bit in length.  Looking at the A1 and T1 UDF encodings, it seems you could lay it out so that a T1 UDF mapped onto the immediate fields of an A1 UDF instruction.    (I've not tried this!)

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  • 0

    Interesting question...

    Are you thinking about hitting this encoding as a branch target or from linear execution?

    I asm because T32 instructions can be either 16 or 32 bit in length.  Looking at the A1 and T1 UDF encodings, it seems you could lay it out so that a T1 UDF mapped onto the immediate fields of an A1 UDF instruction.    (I've not tried this!)

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