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In the Arm Architecture Reference Manual, the instruction encoding diagrams use "sf" to distinguish the bit that selects 32- versus 64-bit registers in the data-processing instructions. What does "sf" stand for? For example, does it stand for "size flag"? Or "size field"?
Similarly, they use "hw" to show the shift amount of a 16-bit value. Does this stand for "half word"?
These acronyms are not defined in the glossary.
Just occurred to me --- perhaps "sf" means "sixty-four"? When the bit is set to 1, the data size is 64 bits.