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In ARM7 and ARM9 PC=current + 8, but in the cortex-A7(8-stage pipeline) the PC is also the same value(PC=current +8), how does this work?

In ARM7 and ARM9 PC=current + 8, but in the cortex-A7(8-stage pipeline) the PC is also the same value(PC=current +8), how does this work?

I think the cortex-A7 has 8-stage pipeline, the PC value is also current+8(this is back-forward for old design), but how it works?

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  • In the 64 bit ARMv8 architecture they've got rid of this bit of history so PC just points to the current instruction as a human would think of it going through them one at a time. In an out of order processor you could have lots of instructions executing at the same time and for each of them the PC is just the PC for that instruction. I hate to think how on earth we'd cope if we had to deal with a single 'hardware' PC I second Axel's advice to try not to make too much sense of PC+8 in ARMv7 and just accept that's what you get.

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  • In the 64 bit ARMv8 architecture they've got rid of this bit of history so PC just points to the current instruction as a human would think of it going through them one at a time. In an out of order processor you could have lots of instructions executing at the same time and for each of them the PC is just the PC for that instruction. I hate to think how on earth we'd cope if we had to deal with a single 'hardware' PC I second Axel's advice to try not to make too much sense of PC+8 in ARMv7 and just accept that's what you get.

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