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In the ARMv7-A/R ARM Issue C I found two instructions with odd encoding: PUSH and POP, encoding A2.
What's the Rt's role? I guess Rt and 'registers'-bitlist needs to match?
Encoding A2 ARMv4*, ARMv5T*, ARMv6*, ARMv7
PUSH<c> <registers> <registers> contains one register, <Rt>
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
cond 0 1 0 1 0 0 1 0 1 1 0 1 Rt 0 0 0 0 0 0 0 0 0 1 0 0
POP<c> <registers> <registers> contains one register, <Rt>
cond 0 1 0 0 1 0 0 1 1 1 0 1 Rt 0 0 0 0 0 0 0 0 0 1 0 0
Don't forget that the ARM instruction set as it exists today wasn't designed all in one go - has "evolved" over a long period of time. Different instructions and features have been added at different times and that explains why the original orthogonal, symmetric instruction set doesn't really appear that way any more!
By looking at the encodings: the instruction set keeps evolving in the future too.
There are big areas of possible instructions not yet in use.
That's the politics? To squeeze the instructions into smallest possible space so that even bigger new instruction groups can be added in the future.