Dear experts,
I can build ATF BL31&OPTEE(BL32) and boot up with ARMv8 CPU, the detailed boot sequence is:
BL1 -> BL2 -> BL31(including PSCI and OPTEED) -> OPTEE -> BL33.
Now I want use the same boot sequence running on ARMv7 CPU.
But there is a problem when I build ATF aarch32 el3 runtime software.
If I build aarch32 el3 runtime software with AARCH32_SP=sp_min, PSCI service can be builtin while there is no opteed.
How can I build ATF that includes PSCI and OPTEED simultaneously?
Does ATF(EL3 runtime software) can implement total secure monitor functions(PSCI and OPTEED)?
For ARMv7 CPU, which portion is used to implement secure monitor functions(PSCI and OPTEED)? ATF? OPTEE?
Thanks for your attention!
Best Regards,
Yan
Hi Emmy0,
Buildroot qemu_arm_vexpress_tz_defconfig has Armv7-A ATF + OP-TEE on qemu, which you could use as example.
ATF is build with the following options (among others):
BL32=tee-header_v2.bin BL32_EXTRA1=tee-pager_v2.bin BL32_EXTRA2=tee-pageable_v2.bin AARCH32_SP=optee BL33=u-boot.bin
In this configuration, PSCI is handled by op-tee.
Best regards,
Vincent.