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Hi, can anyone suggest me how to know the instructions cycle timing of the arm_v8 instructions.does it take more cycles to transmit from neon to basic arm instructions in arm_v8.
please suggest me how to calculate instruction cycles in arm_v8
Well that's true and I sympathize with it, but the document does say it is an optimisation guide. As you say to do reasonable optimisation one should probably be putting in the occasional prefetch. It would be good to have some guidance about that, there are a large number of options and possibilities for use. At the next level it would be good to have something said about the overheads or problems of memory barriers or operations like LDREX even if most people should not be using them directly.
Again, all dependent on the SoC as a whole... It's up to the SiP to provide guidance on how their memory system behaves.