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ARM Cortex-M0+, ARMv6-M, Unprivileged/Privileged Extension

humans_mind

Hi all

I'd like to understand the principle of ARMv6-M architecture with respect to extension options and really appreciate feedback of community.

What is the "Unprivileged/Privileged Extension"?

  • Is it a piece of software?
    • If yes, how to get it? Is it provided for download or does it need to be requested from MCU manufacturer e.g. ST or Renesas?
    • If yes, do I as an programmer have to program it or do I e.g. can choose it as a compiler option?
  • Is it a part of the MCU? (hardware)
    • If yes, how can I check if the chosen MCU (family, e.g. STM32G0x1) has the extension or not.

Thanks in advance!

Jens

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    It's a "configuration option" for the hardware; something the silicon vendor picks when using the ARM chip development "kit"...

    If you're lucky, (one of) the datasheets will have a nice table of which lists all of the configuration options, like:

    I don't see anything like that in the STM32G0x datasheets, but it's hard to tell.  The 'programming manual' talks about the privilege levels, but it's not clear whether that's for all or only some of the ST M0+ chips.  The chip datasheet (ie STM32F081cb.pdf) does say "The devices incorporate a memory protection unit (MPU)", and I believe the MPU requires the Unpriv/priv extention, so I think it does include it...

    Hmm.  CMSIS-Core also defines a preprocessor symbol __MPU_PRESENT indicating whether the chip has the memory protection unit (which requires the priv/unpriv extension.  The way I read the v6m manual, you COULD have the extension without the MPU, and I don't see a separate value for that...)

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  • 0

    It's a "configuration option" for the hardware; something the silicon vendor picks when using the ARM chip development "kit"...

    If you're lucky, (one of) the datasheets will have a nice table of which lists all of the configuration options, like:

    I don't see anything like that in the STM32G0x datasheets, but it's hard to tell.  The 'programming manual' talks about the privilege levels, but it's not clear whether that's for all or only some of the ST M0+ chips.  The chip datasheet (ie STM32F081cb.pdf) does say "The devices incorporate a memory protection unit (MPU)", and I believe the MPU requires the Unpriv/priv extention, so I think it does include it...

    Hmm.  CMSIS-Core also defines a preprocessor symbol __MPU_PRESENT indicating whether the chip has the memory protection unit (which requires the priv/unpriv extension.  The way I read the v6m manual, you COULD have the extension without the MPU, and I don't see a separate value for that...)

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