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Below is from ARMv7 Architecture doc.
An exception is described as asynchronous if either of the following applies: — the exception is not generated as a result of direct execution or attempted execution of the instruction stream — the return address presented to the exception handler is not guaranteed to indicate the instruction that caused the exception.
I really don't quite understand , especially for the first scene.
Anyone can show me an example?
Thanks~
On the "abort" side the most common cause is cache evictions from write-allocate caches getting a bus error back indicating that the physical address they were trying to write to didn't exist. This initial write into the cache succeeds (the VA to PA translation passes as there is a valid mapping in the MMU), the data is written to the cache, and the abort only happens "some time later" when that cache line is written back to memory.
Pete
Thanks very much , that's an excellent example ~