Hello ARM Community,
some time ago I started with Cortex-M1 core on Actel Proasic3L FPGA. I don't have much experience, but I have development board without working example:) I tried to follow Actel's tutorials and create simple LED blinking application, but I got stuck. Unfortunately Actel's support can't help me, at least not now, they don't have working dev board with my FPGA and can't duplicate my issue. Now my case is closed, because they wait for new PCBs. I wait more than month and I decided to ask you here for help, because I need to proceed.
In this first project I want just to read 10 switches and turn on/off 10 LEDs. I created Cortex-M1 with peripherals from Actel IPcores. It has CortexM1 core, CoreAHBLite, CoreMemCtrl, CoreAHB2APB, CoreAhbSram, CoreAPB and CoreGPIO. In this case I think that memory map is important.
CoreAHBLite has:
CoreAPB has:
I can synthesize it and load into FPGA. Then I use SoftConsole IDE to prepare application, it is simple, but I'm not sure if correct:
#include "hal.h"
#include "CortexM1_Top_hw_platform.h"
#include "core_gpio.h"
#define GPOUT_INIT_STATE 0x00000000
gpio_instance_t g_gpio;
int main()
{
uint32_t io_state;
/**************************************************************************
* Initialize the CoreGPIO driver with the base address of the CoreGPIO
* instance to use and the initial state of the outputs.
*************************************************************************/
GPIO_init( &g_gpio, COREGPIO_BASE_ADDR, GPOUT_INIT_STATE );
while( 1 )
/**********************************************************************
* Read inputs.
*********************************************************************/
io_state = GPIO_get_input( &g_gpio );
* Write state of inputs back to the outputs.
GPIO_set_output( &g_gpio, io_state );
}
I build it in Debug and tried to debug, but all what I see is the console output:
source .gdbinit
set arm fallback-mode thumb
target remote | "C:/Microsemi/Libero_v11.4/SoftConsole/Eclipse//../Sourcery-G++/bin/arm-none-eabi-sprite" flashpro:?cpu=Cortex-M1 "C:/Users/ds/Documents/FPGA/CortexM1_Test2/SoftConsole/CortexM1_Top_CortexM1Top_0/CortexM1_Top_CortexM1Top_0_app/Debug"
arm-none-eabi-sprite: Using memory map C:/Users/ds/Documents/FPGA/CortexM1_Test2/SoftConsole/CortexM1_Top_CortexM1Top_0/CortexM1_Top_CortexM1Top_0_app/Debug/memory-map.xml
arm-none-eabi-sprite: Target reset
0x00000000 in __text_start ()
set mem inaccessible-by-default off
load
Loading section .text, size 0x2f4 lma 0x0
Loading section .data, size 0x4 lma 0x2f4
Start address 0x64, load size 760
Transfer rate: 18 KB/sec, 380 bytes/write.
monitor debug-reset
thb main
Hardware assisted breakpoint 1 at 0x36: file ../main.c, line 18.
cont
Program received signal SIGTRAP, Trace/breakpoint trap.
Could you give me any hint what to do with it?
Daniel,
I've had similar issues. I'm using the A3PL development board from Microsemi.
I've been successful reading the switches, driving the LEDs, tx/rx with the UART, a 3rd party CAN IP, running from 32 bit flash, and the external RAM.
You may have a couple of issues.
First, please make sure the CoreMemCtlr is configured as follows:
SRAM mode -> Asynchronous
Flash data bus width 32
Flash wait states: 1,1
SRAM wait states: 0,1
Read/Wrte enables shared: No
Flash Addressing: 0,0,HADDR[27:2]
SRAM Addressing: 0,0,HADDR[27:2]
Please remember to connect the address lints to MADDR[0:23]. While the schematic shows MEM_ADDR2-MEM_ADDR25,
the CoreMemCtlr will drive the lines with the CPU bus A2-A25 if configured above.
The second issue is probably the default compiler options for your project. I'm not an expert with all the different settings,
but I found out that if you remove the options listed as"Other Options (-Xlinker [options])" in the GNU C Linker -> Miscellaneous tab, things
seem to work.
Solved with setting Remap pin of memory controler to '1'... then I had properly addressed SRAM to 0x00000000 and I was able to run debug configuration.
I tried this but I am getting the system hanging after starting openocd and then starting gdb so instead of using SoftConsole since it just says openocd timed out and didn't give a descriptive answer, I opened two terminals in cygwin one for open openocd and one for gdb and the arm-*-gdb.exe terminal window says this :
Why is the target not halting?
(gdb) set mem inaccessible-by-default off(gdb) target remote localhost:3333Remote debugging using localhost:33330x00000000 in ?? ()
while then openocd terminal starts well until I type the target command above.
do_board_reset_initInfo : FlashPro ports available: usb98196Info : FlashPro port used: usb98196Info : clock speed 1000 kHzInfo : JTAG tap: FPGA.tap tap/device found: 0x3bc281cf (mfg: 0x0e7 (GateField)part: 0xbc28, ver: 0x3)microsemi_flashpro tunnel_jtag_via_ujtag onInfo : JTAG tap: FPGA.tap disabledInfo : JTAG tap: FPGA.dap enabledInfo : Cortex-M1 IDCODE = 0x4ba00477Info : FPGA.cpu: hardware has 2 breakpoints, 1 watchpointscortex_m auto_bp_type offInfo : accepting 'gdb' connection on tcp/3333undefined debug reason 7 - target needs resetWarn : negative acknowledgment, but no packet pendingWarn : The target is not in the halted nor running stated, stepi/continue ignored