The "Armv8 Architecture Reference Manual" says the following about the non-Reordering attribute for Device memory:
"For all memory types with the non-Reordering attribute, the order of memory accesses arriving at a single peripheral of IMPLEMENTATION DEFINED size, as defined by the peripheral, must be the same order that occurs in a simple sequential execution of the program."
Who sets IMPLEMENTATION DEFINED SIZE? Is it set by the hardware engineer who designs the processor, or can IMPLEMENTATION DEFINED SIZE be configured by software, for example, when software sets up the page tables? Could someone point me to a section of the "Armv8 Architecture Reference Manual" that clarifies this?
jatron said:Does the non-Reordering attribute guarantee that the write to peripheral A happens before the write to peripheral B?
No.
jatron said:How do you know the original quote refers to data access sizes and not MMIO size?
Because of the grammar. The original quote is replicated below:
We do not read the sentence as "a single peripheral of IMPLEMENTATION DEFINED size". That interpretation is absurd.
The phrase "of IMPLEMENTATION DEFINED size" describes "memory accesses", not "peripheral".
Below is the same quote with commas placed to clarify the sentence:
"For all memory types with the non-Reordering attribute, the order of memory accesses, arriving at a single peripheral, of IMPLEMENTATION DEFINED size as defined by the peripheral, must be the same order that occurs in a simple sequential execution of the program."
Thanks for your answer to #1.
I'm not convinced about #2 though. Reading section "B2.7.2 Device memory" of the DDI 0487G.a document, I think it's more likely that "IMPLEMENTATION DEFINED size" refers to the MMIO size. Can we contact the authors to understand what the original intent was?
Comments on the content can be sent to errata@arm.com. Or, better still is to open a support case with Arm.