as we know supervisor mode is priviliged and user is not. at reset time in debugging mode, i read the cpsr it is 0x1d3 means in supervisor mode, so i can change CPSR so i changed it to 0x1d0 which is user mode, since user mode is unpriviliged so i must not able to modify CPSR, but when i again write it to 0x1d3, i updates. why is it so?
Which processor it is? Cortex-M4?
Cortex M4 has APSR, EPSR and IPSR.
Try using the MSR instruction to write to the special registers. Also note the following from the M4 device user guide (Page 3-164): (OR see this link - ARM Information Center and ARM Information Center)
The register access operation in MSR depends on the privilege level. Unprivileged software can only access the APSR.
Attempts to write the EPSR using the MSR instruction in application software are ignored.
MSR
Table 2.3. PSR register combinations
[a] The processor ignores writes to the IPSR bits.
Hope it helps.
i am using CORTEX-A9 Processor.
anoopstm wrote: i am using CORTEX-A9 Processor.
anoopstm wrote:
Oh... in that case, my answer doesn't apply !!!