We are running a survey to help us improve the experience for all of our members. If you see the survey appear, please take the time to tell us about your experience if you can.
I am using Omap3515 (Arm Cortex A8). Enabled I-Cache, D-Cache, Branch Prediction and MMU.
I am getting a data abort, if I try to copy a frame buffer of 600KB from an external memory region to another external memory region. After the data abort, I could notice that the SDR i.e SDRAM is not accessible.
I have enabled MMU in such a way that PA=VA.
There is no issue if I copy less amount data.
And also, If I disable D-Cache then there is no abort and it works fine. But I would like to enable D-Cache for faster access.
Thanks and regards,
Gopu
Hello vskgopu,
The contents of
1. ARM Information Center
would be no errors but I and D cache enabling codes are not shown.
2. ARM Information Center
would also be no errors.
Unless I or D cache and MMU are enabled at the same time, 'Not Allowed' state of the link 2 would happen.
Of course, I know these my comments would not be related with your problem.
Best regards,
Yasuhiko Koumoto.