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I came across a bug that the region size defined in MPU->RASR is halved.
In my case, the region number is 3, i.e., MPU->RNR = 3. The memory ranges of region 4-7 are not overlapped to region 3.
The value of RBAR of region 3 is 0x2001_fd93, indicating that the start address is 0x2001_fd80.
The value of RASR is 0x1306_000f, indicating that the region size is 0x100.
Therefore, the memory range of region 3 is 0x2001_fd80<=addr<=0x2001_fe7f.
However, when I tried to dereference a pointer that points to 0x2001_fe00, 0x80 bytes offset to the region start address 0x2001_fd80, it raised a memory management fault.
But the dereference to the memory address 0x2001_fdff is OK.
It appeared that the size declared by region 3 is halved from 0x100 to 0x80.
Is this a hardware bug? Does anybody know why this can happen? The MCU I use is CortexM4.
Many thanks in advance!
Probably because the base address of the region isn't naturally aligned wrt to the region size.