Hi expert
Since I debug AM3354(Cortex-A8 Core), I want to enable IRQ, so I write the assembler code:
IntrEnableIrq MRS R0, CPSR ; Pickup current CPSR BIC R0, R0, #0X80 ; Clear interrupt lockout bits in CPSR MSR CPSR_c, R0 ; Setup new CPSR value MOV pc, lr ; back
and I put a break point in
MSR CPSR_c,R0
and I run the program in full speed, then stop in MSR CPSR_c, then I run the program again,
but the program come to hard fault immediately.
I am sure the program run to error immediately, even not come to MOV pc, lr.
So I check the CPSR register's bits value,
Bit7(IRQ set bit is cleared) .
It is really confused me a long time, ARM Mode is 10111(ABT mode), and I can change IRQ(bit 7)from 1 to 0, then the program
come to error immediately , why this happen? I really need your help.
Best Regards
Jack
LR is the "return address". But different meaning in different modes. Please check the respective chapters on exceptions in the ARM manual(s).