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Hi ARM experts,
I have just remembered that the entire dcache could not be invalidated by one instruction from ARMv7.
I would like to know the reason.
Can anyone answer this question?
Thank you and best regards,
Yasuhiko Koumoto.
I don't know but for the data cache what one would want normally is a clean and invalidate and the clean can take a long time - so the instruction can be interrupted and will restart from the beginning on ARMv6. Often there is no need to redo all the cache lines already done even if an interrupt fills some, and the problem only gets worse with larger caches. I'm not at all sure extra hardware could help much considering the time it takes to clear a line when needed and software might be able to do something intelligent about leaving parts of the cache alone. The whole business about allowing interrupts and restarting sounds to me like a bug waiting to manifest itself.
I think the reason would come from the multi-core functions. Anyay, ARM11 MPCore has the entire dcache invalidate instruction but Cortex-A does not have it. I would like to know the reason.
Do you actually want to invalidate it without cleaning it?
The dcache invalidate and clean instruction had been dropped at the ARMv7, either. I say about the all dcache instructions which deal with the entire cache by one CP15 instruction. Of course, I feel no inconvenience at the present situation. However, I would like simply to know the reason why entire dcache operations are deteded although ARM11 MPCore supported such instructions.I am afraid there would have been some inconveniences or bugs for such the entire dcache operations.