I have bunch of questions related to AXI. Can someone help me by answering those?
AxSize can be varied across multiple transactions?
whose duty is to set byte strobe in a transfer? Is it the master which should generate byte strobes along with un-aligned address?
In a system can i have 2 AXI interfaces with different data bus widths(eg: master0->interconnect had 64bit data bus, interconnect-> slave0 is 32bit)? In this case is it the interconnect which should take care of transaction splitting?
Thanks,
Naveen
Hi Naveen,
• AxSize can be varied across multiple transactions?
Yes - the information on AxSIZE is transferred once as part of the Write-Address or Read-Address handshake, and dictates the the number of bytes in for each data transfer of that burst. Different transactions can have different AxSIZEs, provided you don't use a size that is wider than the bus.
Incidentally, in AXI terms, 'transaction' and 'transfer' have very distinct meanings. A transaction is a single exchange of information - that is, with one xVALID/xREADY handshake. A 'transaction' is an entire burst of transfers, comprising an address, one or more data transfers and a response transfer (writes only).
• Whose duty is to set byte strobe in a transfer? Is it the master which should generate byte strobes along with un-aligned address?
Yes, you are correct, this is part of the masters responsibility for a write transaction.
• In a system can i have 2 AXI interfaces with different data bus widths (eg: master0->interconnect had 64bit data bus, interconnect-> slave0 is 32bit)? In this case is it the interconnect which should take care of transaction splitting?
Yes, you are correct again. Two masters of different bus widths can connect to the same slave, but in your interconnect you will need upsizer(s)/downsizer(s) to that the transactions are correctly converted.
Dave