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Architectures and Processors forum Penalty estimate of TLB miss or table walk in armv8

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Penalty estimate of TLB miss or table walk in armv8

Lozano2 over 4 years ago

Hello!

Is there are rough estimate oh what would be the penalty for each tlb miss or table walk for different table levels? And what are the factors that can determine the deviation between each measurement?

I have been trying to measure this using the PMU. But I would like to have something from the experts.

Saludos,

Alejandro

0 42Bastian Schick over 4 years ago

Interesting question. Why do you want to know?
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0 XNoOp over 4 years ago

Hello Alejandro,

At the linux OS level you can check the TLB miss penalty with the lmbench micro-benchmarks: manpages.ubuntu.com/.../lmbench.8.html
At the hardware level, you should consider whether the page table is cacheable in L2 cache.

Regards.

Florian
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