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Cortex-M0: How to switch from one program to another

Hi,

In my Cortex-M0 project, there are two program images residing at different memory locations: 0x0000_0000 and 0x0010_0000.  Each program has its own vector table.  M0 will boot from the program at 0x0010_0000 then switch to the other program (0x0000_0000) at the end.

What is the correct way to switch to the porgram at 0x0000_0000?  I'm not sure whether the following instructions are correct or not.

     LDR     R6, =0x1                             ; set R6 to 0x0000_0001 due to Thumb mode

     LDR     R0, [R6]

     MOV     SP, R0

     LDR     R1, [R6, #4]

     BX      R1

Can someone please point me the right implementation?  Thanks a lot.

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  • Hi jensbauer,

    Thank you for your fast response.

    I didn't know Cortex-M have a built-it ROM bootloader, reading the ATMEL SAM R21 ( The ARM CORTEX M0+ MCU I am using) datasheet I only noticed that there is a FUSE called BOOTPROT (I haven't used a FUSE before, so I don't know if it must be set up using the JTAG or maybe writing flash memory position directly. I say this because there is a lot of references to Non volatile memory when BOOTPROT comes up) to set aside some memory for the BOOTLOADER in the lower rows of the NVM.

    Booting from RAM? I haven't done this before, is complicated? It could be great, but I need to develop something similar in a 8051 architecture, so I have some RAM constraints, and I hope that just few applications updates will be required in the future .

    The LZ4 decompression routine for Cortex-M0 and later sounds great. It is used to compress the data to be send to the bootloader in order to decompress it to get the final modifications or for the bootloader's code itself??. I will study it. If I get performance improvement it would be really welcome.

    Again, thank you very much, and any support will be really appreciate.

    Best regards,

    Iván Gómez Bustinduy

Reply
  • Hi jensbauer,

    Thank you for your fast response.

    I didn't know Cortex-M have a built-it ROM bootloader, reading the ATMEL SAM R21 ( The ARM CORTEX M0+ MCU I am using) datasheet I only noticed that there is a FUSE called BOOTPROT (I haven't used a FUSE before, so I don't know if it must be set up using the JTAG or maybe writing flash memory position directly. I say this because there is a lot of references to Non volatile memory when BOOTPROT comes up) to set aside some memory for the BOOTLOADER in the lower rows of the NVM.

    Booting from RAM? I haven't done this before, is complicated? It could be great, but I need to develop something similar in a 8051 architecture, so I have some RAM constraints, and I hope that just few applications updates will be required in the future .

    The LZ4 decompression routine for Cortex-M0 and later sounds great. It is used to compress the data to be send to the bootloader in order to decompress it to get the final modifications or for the bootloader's code itself??. I will study it. If I get performance improvement it would be really welcome.

    Again, thank you very much, and any support will be really appreciate.

    Best regards,

    Iván Gómez Bustinduy

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