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Difference between FIXED and INCR burst in AXI?

For any burst transfer Master has to pass only first address, for the consecutive transfer address calculation is taken care by Slave. So i want to know what is the basic difference in FIXED and INCR burst transfer?

Parents
  • Hi Koumoto-san,

    Thanks a lot for your helpful reply. With this example, Master behaviour is clear to me.

    Similarly during read for the same example then I assume slave will reciprocate the behaviour.

    That is it will put all the 4 bytes for ARLENGTH=4 bytes on ARDATA[7:0] of the bus and for INCR on RDATA[7:0], RDATA[15:8], RDATA[23:16] and RDATA[31:24].

    Also for ARSIZE equal to bus width I feel there would be no difference from slave side also.

    As for this same example bus width=4 bytes slave would 4 bytes for each transaction for both INCR and FIXED.

    Are my assumpltions correct kindly let me know.

    Best regards,

    Chandan

Reply
  • Hi Koumoto-san,

    Thanks a lot for your helpful reply. With this example, Master behaviour is clear to me.

    Similarly during read for the same example then I assume slave will reciprocate the behaviour.

    That is it will put all the 4 bytes for ARLENGTH=4 bytes on ARDATA[7:0] of the bus and for INCR on RDATA[7:0], RDATA[15:8], RDATA[23:16] and RDATA[31:24].

    Also for ARSIZE equal to bus width I feel there would be no difference from slave side also.

    As for this same example bus width=4 bytes slave would 4 bytes for each transaction for both INCR and FIXED.

    Are my assumpltions correct kindly let me know.

    Best regards,

    Chandan

Children
  • Hello Chandan,

    I think you are basically correct.
    I'm interested in the sentences of "Also for ARSIZE equal to bus width I feel there would be no difference from slave side also".
    The information which a slave can get will be the same but the interpretation of it will be implementation dependent.
    If the slave is a memory device such as SRAM, FIXED and INCR behavior should differ.
    Of course, in the case of AxLEN=0 (i.e. 1 burst), they are completely the same.


    Best regards,
    Yasuhiko Koumoto.

  • Hello Chandan,

    If a slave would act as FIFOs, you are right.

    If you are the slave designer, you can interpret the AxBURST according to your convenience.

    Best regards,

    Yasuhiko Koumoto.

  • Thanks a lot Koumoto-san.

    Regards,

    Chandan

  • Hi Koumoto-san,

    Thanks a lot for your kind reply.

    By "Also for ARSIZE equal to bus width I feel there would be no difference from slave side also" I was meaning about the activity

    seen on bus from slave side only.

    Just for the sake of completion I would like to know how the implementation would differ in slave.

    For INCR slave would get the starting address=0x0, for AxSIZE=4, 4 bytes of write data on the bus

    and store the 4 transfers for AxLENGTH=4 by incrementing internal address to 0x4,0x8 and 0xC

    and for FIXED it would store these transfer like a FIFO( for FIXED is supposed to be used for slaves like FIFOs)

    But all the 4 transfers would be stored in slave for FIXED transfer also and not be overwritten.

    Kindly let me know.

    Best regards,

    Chandan