I tried using variable names ( AD0 , Ain0 ) non of them was identified in Keil's logic analyzer , and also non of VTREG signals was related to ADxx ( Update : discussion moved to https://community.arm.com/developer/tools-software/tools/f/keil-forum/45258/how-to-simulate-analog-input-to-adc0-pin-on-logic-analyzer/162319#162319 )