This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

Problems with interrupting LDM/STM Cortex M4?

I am seeing stack corruption running a Cortex M4 that seems to be related to interrupting multicycle instructions.

The interrupt occurs during a STMDB sp!, {r4, r5, r6, r7, r8, r9, sl, lr}

The ICI bits at the time of the interrupt equal 7. This means that the STM was partially completed, and should be resumed starting at r7.

However, if I look at the stack at the time of the interrupt, I see 4 words were written by the interrupted STM, namely r4, r5, r6, and r7. This means that

r7 will be written again when the processor resumes the STMDB instruction.

This does not happen all the time. But it forces me to disable interruption of multicycle instructions.

Parents
  • Hi, this happens if the STMDB instruction is part of an If-Then instruction block, in this case the instruction is restarted from the beginning after interrupt completion.

    It should not corrupt the stack but may generate problems if the accessed memory is in the peripheral´s region and you unintentionally write twice to a peripheral.

    The reason is because ICI and IT bits are in the same place.

    Could you verify if your multicycle instruction is inside an IT instruction block?, If so, just change the code to avoid it, instead of disabling interrupts.

Reply
  • Hi, this happens if the STMDB instruction is part of an If-Then instruction block, in this case the instruction is restarted from the beginning after interrupt completion.

    It should not corrupt the stack but may generate problems if the accessed memory is in the peripheral´s region and you unintentionally write twice to a peripheral.

    The reason is because ICI and IT bits are in the same place.

    Could you verify if your multicycle instruction is inside an IT instruction block?, If so, just change the code to avoid it, instead of disabling interrupts.

Children