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can i get cpu run state aarch64 or aarch32 fo cortex a57?

jhb

i wang to get cpu run state aarch64 or aarch32? is there ang regisister can ?cpu is cortex a57 series

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  • 0 in reply to vstehle

    When taking an exception, the processor state is stored in the relevant Saved Program Status
    Register (SPSR), in a similar way to the CPSR in ARMv7. The SPSR holds the value of PSTATE
    before taking an exception and is used to restore the value of PSTATE when executing an
    exception return.

    by this i can read spsr,but when switch from el3 to el2 ,pstate is save to spsr_el3, i can not access spsr_el3 when i in el2.

Reply
  • 0 in reply to vstehle

    When taking an exception, the processor state is stored in the relevant Saved Program Status
    Register (SPSR), in a similar way to the CPSR in ARMv7. The SPSR holds the value of PSTATE
    before taking an exception and is used to restore the value of PSTATE when executing an
    exception return.

    by this i can read spsr,but when switch from el3 to el2 ,pstate is save to spsr_el3, i can not access spsr_el3 when i in el2.

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