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Cortex-M MPU limitations

Hi All,

The title may seem a bit negative, just from my personal point of view.

What is the main reason of the two requirements of setting up MPU, namely size and start addresses of MPU regions.

First, the size of an MPU region must be 2^n x 32 bytes. This makes quite some of waste of memory space because one must size an output section in linker script corresponding to its MPU size. Second, the start address of an MPU region must be multiple of the MPU size.

So, during linking, one must place an output section aligned to its MPU region. This again creates some waste in the memory space.

Moreover, one must do twice linking!  One gets the actual size of an output section in the first time and computes new size and start address according to its MPU region. Then, the second linking must be performed to place all output sections at right place.


A less serve problem I encountered was the number of MPU regions. In my opinion, 8 cannot be enough in some cases.

How do you guy think of the problem described here?

Best regards. Teddy

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