Hi,
I am working with GICV3 on a Cortex A53 that is currently in aarcH32 EL2 state.
When I try to read the ICC_HSRE I get an undefined instruction and the system crashes.
The instruction I am using is
mrc p15, 4, r7, c12, c9, 5 @ ICC_HSRE
mrc p15, 4, r7, c12, c9, 5
@ ICC_HSRE
Any idea what is wrong here, and why I get an undefined instruction.
In aarch32 EL2, I am pretty sure this is the register that should be used to access the GIC System Register Enable Register?
Hi PJ Nee,
GIC-500 is an implementation of the GICv3 architecture:
https://developer.arm.com/ip-products/system-ip/system-controllers/interrupt-controllers