Hi,
I have a need at determining a page size, particularly for a Non-secure EL1, stage 1. I know of
__asm__ volatile ("at s1e1r, %0" : : "r" (buf)); __asm__ volatile ("mrs %0, PAR_EL1\n" : "=r" (par_el1));
par_el1 on success yields ATTR, PA, NS, etc. but not a page size.
I know also that can directly read the TLB RAMs (precisely the main TLB RAM would satisfy) but this looks like too difficult for having to finding the address in a way. Also the TLB entry can gets flushed in between a read from the memory the page size to be checked and reading the main TLB ram.
Thanks,
Marek