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How to verify the Cortex-M0 thumb instructions ? I found one chip( RAM &FLASH is OK) when it run LDR relative instructions,the program is in Hardfault。But others run the same code is OK

Could you help me to solve the problem.Do  you have the code  to verify the thumb instruction ? If have,the code can check any  corner the functions of thumb instructions

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  • Is this a timing path issue? Does it fail when running at lower frequency?

    In general we expected DFT to pick up this kind of issues. There are some limitations with DFT, for example, timing violations might not be picked up by DFT because scan clock usually run slower, and defects could be hidden as clock signal's characteristic could be very different in scan mode. But test coverage of software tests are usually much lower than DFT.  In general, DFT is the recommended test method.

    regards,

    Joseph

Reply
  • Is this a timing path issue? Does it fail when running at lower frequency?

    In general we expected DFT to pick up this kind of issues. There are some limitations with DFT, for example, timing violations might not be picked up by DFT because scan clock usually run slower, and defects could be hidden as clock signal's characteristic could be very different in scan mode. But test coverage of software tests are usually much lower than DFT.  In general, DFT is the recommended test method.

    regards,

    Joseph

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