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How to verify the Cortex-M0 thumb instructions ? I found one chip( RAM &FLASH is OK) when it run LDR relative instructions,the program is in Hardfault。But others run the same code is OK

hyue over 6 years ago

Could you help me to solve the problem.Do you have the code to verify the thumb instruction ? If have,the code can check any corner the functions of thumb instructions

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Haiyan over 6 years ago +2 verified

The Hardfault may be possibly caused by: 1. The access address is not aligned to its access size. 2. The external bus-matrix-slave responses with error response. I think the corner case will be different...
Joseph Yiu over 6 years ago in reply to Andy Neil +1 verified

Hi Andy, That's true. But as the question is about memory testing, I would expect the program would have enabled the memories before starting the test ;-) (Note: for memories it is less common for...
Joseph Yiu over 6 years ago in reply to hyue +1 verified

What is the initial state for R2 when you run the test? ( D2 ? ;-) ) Is it an FPGA prototype?

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0 Andy Neil over 6 years ago in reply to hyue

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0 Andy Neil over 6 years ago in reply to hyue

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