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Unknown instruction jump

Hi,

I try to run the following code with a Cortex-A8 processor:

asmfunc1: CMP r1, #0 ; Compare r1 to zero.

BCS $1 ; If carry is set, branch to $1;

ADDS r0, r0, #1 ; else increment to r0

MOVCS pc, lr ; and return.

$1:  LDR r2, [r5], #4 ; Load indirect of r5 into r2

; with write back.

.newblock ; Undefine $1 so it can be used

; again.

ADDS r1, r1, r2 ; Add r2 to r1.

BPL $1 ; If the negative bit isn't set,

; branch to $1;

MVNS r1, r1 ; else negate r1.

$1:  MOV pc, lr ; Return.

At the first lable $1, r5 content is zero. When CPU runs from $1, it does not go to line below the first $1. It goes to a line:


00020010:   E59FF018 LDR       PC, 0x20030
00020014:   E59FF018 LDR       PC, 0x20034

I don't know what does not set correctly causes this. Because I just find that software simulator behaves correctly, it suspects that in the board emulator, the asm function is in a privilege mode related status(?)

This small project is a bare metal type. In main() of the .c file, the asm function is called. I do not find ARM mode control settings in the ARM compiler. What else can change Arm mode in compilation?

Could you help me to understand the curious instruction jump?

Thanks,

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  • > When CPU runs from $1, it does not go to line below the first $1.

    What mode is the processor in when it ends up at that address? Are you ending up in a fault handler because the address stored in r5 is not mapped in the page tables (or physical memory if you are running with MMU off) when the load tries to execute?

    > At the first lable $1, r5 content is zero.

    ... because it sounds like you are trying to dereference a NULL pointer =) [it may not be - mapping real memory at 0x0 is valid, but generally viewed as bad practise because NULL is such a common fault value].


    HTH, Pete


Reply
  • > When CPU runs from $1, it does not go to line below the first $1.

    What mode is the processor in when it ends up at that address? Are you ending up in a fault handler because the address stored in r5 is not mapped in the page tables (or physical memory if you are running with MMU off) when the load tries to execute?

    > At the first lable $1, r5 content is zero.

    ... because it sounds like you are trying to dereference a NULL pointer =) [it may not be - mapping real memory at 0x0 is valid, but generally viewed as bad practise because NULL is such a common fault value].


    HTH, Pete


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