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Could you tell me what the gate count of ARM926 is?

merkury

Does anyone has such experience?

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  • 0 in reply to Alban Rampon

    Hi Alban

    Thank you for your reply!

    Could you give the gate count of STD of ARM926? No cache, no memory. I only want to know the gate counts, so I think it has no relationship with the technology.

    You can use the small configuration for ARM926. Or you use an alike configuration that others used.

    Is 200KG+ reasonable?

    Thank you.

    Merkury

  • 0 in reply to merkury

    Hi,

    Further to Alban's reply, it really is difficult to give a definitive answer to this question. Since we deliver the ARM926EJ-S to licensees as synthesizable VHDL, the gate count of the final device depends on the design rules and cell libraries used as well as the configuration options.

    Chris

  • 0 in reply to Chris Shore

    Hi Chris,

    Thank you for you reply!

    I saw this table in your website, so do you have the area information under TSMC 40nm?

    Or do you have the gate count under TSMC 90nm G? We can use "0.5/area of 2-input NAND in ARM SC7" to compute the rough number of gate count.

    Do you think so?

    ARM926EJ-S Performance, Power & Area 
    Process

    TSMC 180nm G

    TSMC 130nm G

    TSMC 90nm G

    Speed Optimized

    Speed Optimized

    Area Optimized

    Speed Optimized

    Area Optimized

    Standard Cell Library

    ARM SC9

    ARM SC12

    ARM SC9

    ARM SC12

    ARM SC7

    Performance (Total DMIPS)

    220

    304

    262

    517

    275

    Performance (DMIPS/MHz)

    1.1

    1.1

    1.1

    1.1

    1.1

    Max Frequency* (MHz)

    200

    276

    238

    470

    250

    Cache Size

    8K/8K

    8K/8K

    8K/8K

    8K/8K

    8K/8K

    Area - with cache (mm2)

    6.5

    2.78

    2.39

    1.40

    0.85

    Area - w/o cache (mm2)

    3.0

    1.61

    1.45

    1.01

    0.50

    Power with cache (mW/MHz)

    -

    -

    0.48

    0.235

    0.14

    Power w/o cache (mW/MHz)

    -

    -

    0.36

    0.20

    0.11

    Power Efficiency† - with cache (DMIPS/mW)

    -

    -

    2.29

    4.68

    7.85

    Power Efficiency† w/o cache (DMIPS/mw)

    -

    -

    3.05

    5.5

    10.0

  • 0 in reply to merkury

    Yes, I suppose you could reverse-engineer the area figures! But we don't keep that table up to date and I don't believe we have newer information from the ARM926. Remember that it is quite an old processor these days!

    Can I ask why you are so keen to know the gate count? Most people would be concerned with the area more than anything else.

    Chris

  • 0 in reply to Chris Shore

    Hi Chris,

    Because we want to use a CPU to do our control and a little compution work. We are evaluating the ARM926 and some other CPUs. They have the similiar performance but we don't know the area of ARM926 under 40nm process. So I log in and want to find some help here.

  • 0 in reply to merkury

    Hi again,

    I have just had a word with the Product Manager for the ARM9 range. He confirms that we don't have data for this process. He is, however, happy for you to contact him direct and he is happy to try to help out with your evaluation. Can you email me directly (Chris.shore@arm.com) and I will send you his details.

    Hope this helps.

    Chris