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Hi,
I would like to know whether the cortex-A8/A15 L1cache has ECC or parity check for error checking, or not.
I know L2 cache has ECC function. Bur I don't know about L1 cache.
Please let me know.
Best regards,
Michi
ECC is optional on the Cortex-A15, see here:
ARM Cortex-A15 MPCore Processor Technical Reference Manual: 6.4.8. Error Correction Code
Cortex-A8 has optional parity:
Cortex-A8 Technical Reference Manual: 7.8. Parity detection