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Cortex-M0DS Kit computing power and interfacing

Ketan

Greeting of the day
Hello. My name is Ketan. I've been recently granted access to the design start kit for the Cortex-M0DS processor.I also downloaded some examples design from ARM website which interfaces AMBA bus with Cortex-M0DS processer( link of examples http://www.arm.com/files/zip/CM0DS-DesignKit.zip).


I already interface AHB2LED,AHB2MEM_V2,AHB2GPIO,AHB2UART WITH CORTEX-M0DS processor and implemented it on Atlys Spartan-6 FPGA board (link for board Digilent Inc. - Digital Design Engineer's Source ) and it is working fine. I am currently facing the following problem which i am unable to figure it out for that I need some guidance.


  1. I need to process two signal which we are taking through ADC, do digital filtering and feature extraction(peak detection - and to take the result using UART to host PC for that i already implemented all parameter and I am unable to figure out about ADC ip core(as it contain both analog and digital part).
  2. The FPGA board i am using does not have cellular RAM and parallel flash insted it has 128Mbyte DDR2 memory array for that purpose I need to implement DDR2 memory controller.
  3. And third question, is there is any standard procedure to find out whether Cortex-M0DS (limited functionality wrt actual Cortex-M0) processor is suitable for my application or not (i.e Cortex-M0 has enough computing power for my application or not). As my application is aquaring two analog signals(around 100 hz frequency)  and do digital filtering and feature extraction (peak detection) from the signal. [I already test the code on Cortex-M3 processor in a kit LPC1768 and it is working fine].


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    Dear Ketan,

    Thanks for asking. Here's what I would suggest:

    1. ADC is not part of the Cortex-M0 DesignStart (CM0_DS) IP's Design Kit. It has to be designed separately. It would be beneficial designing an ADC, for then you will have developed in-house or local expertise and contributed to the creation of a local ecosystem of knowledge wherever you are. Here are a couple of student project papers you could take a look at for help on ADC Design: (1) 12-Bit Pipelined ADC Design Project (2) Design of 12-Bit ADC.
    2. You could try using the Nexys3 FPGA (Spartan 6) platform which has got on-board flash. You should be able to move from the Atlys to the Nexys3 platform swiftly, because the Design Kit for the CM0_DS IP was developed on the Nexys3 platform. Or you could design a memory controller to be able to continue using the Atlys platform, once again helping to develop in-house expertise and contributing to a local ecosystem of knowledge.
    3. The ARM Cortex-M0 has enough computing power for your and many other kinds of applications. Many Cortex-M0 based development platforms have already been out there in the market for a while, such as the LPC1115, LPC11U24 and PSoC4, to name a few, routinely handling these kinds of applications. Furthermore, the CM0_DS IP is similar in functionality with respect to the actual Cortex-M0 processor. Its uniqueness is that it has been pre-configured to handle 16 nested vector interrupts for quick and easy Out-of-Box use by beginners in the area of SoC Design and those interested in rapidly designing an SoC and fabricating silicon for a specific application. The application specificity resulting from doing your own SoC designs has lots of potential benefits in terms of being able to keep the system (into which the SoC goes) simple in its operation (without the overkill of several unnecessary interfaces), the system form-factor compact, and any future system debug easy, quick and manageable.

    Hope the above suggestions help.

    Regards,

    Sadanand Gulwadi

    ARM University Program Manager (Bangalore)

Reply
  • 0

    Dear Ketan,

    Thanks for asking. Here's what I would suggest:

    1. ADC is not part of the Cortex-M0 DesignStart (CM0_DS) IP's Design Kit. It has to be designed separately. It would be beneficial designing an ADC, for then you will have developed in-house or local expertise and contributed to the creation of a local ecosystem of knowledge wherever you are. Here are a couple of student project papers you could take a look at for help on ADC Design: (1) 12-Bit Pipelined ADC Design Project (2) Design of 12-Bit ADC.
    2. You could try using the Nexys3 FPGA (Spartan 6) platform which has got on-board flash. You should be able to move from the Atlys to the Nexys3 platform swiftly, because the Design Kit for the CM0_DS IP was developed on the Nexys3 platform. Or you could design a memory controller to be able to continue using the Atlys platform, once again helping to develop in-house expertise and contributing to a local ecosystem of knowledge.
    3. The ARM Cortex-M0 has enough computing power for your and many other kinds of applications. Many Cortex-M0 based development platforms have already been out there in the market for a while, such as the LPC1115, LPC11U24 and PSoC4, to name a few, routinely handling these kinds of applications. Furthermore, the CM0_DS IP is similar in functionality with respect to the actual Cortex-M0 processor. Its uniqueness is that it has been pre-configured to handle 16 nested vector interrupts for quick and easy Out-of-Box use by beginners in the area of SoC Design and those interested in rapidly designing an SoC and fabricating silicon for a specific application. The application specificity resulting from doing your own SoC designs has lots of potential benefits in terms of being able to keep the system (into which the SoC goes) simple in its operation (without the overkill of several unnecessary interfaces), the system form-factor compact, and any future system debug easy, quick and manageable.

    Hope the above suggestions help.

    Regards,

    Sadanand Gulwadi

    ARM University Program Manager (Bangalore)

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