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Cache lock down in ARM Cortex-A7

Anshul

I want to improve the performance of some game in our platform. I have heard of cache lock down feature to achieve performance improvement. Please suggest me how to use this feature in ARM Cortex-A7 for performance improvement.

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  • 0 in reply to Peter Harris

    Hi Peter,

    Thanks a lot for your reply.

    As you know it's very hard to reproduce cache coherency problems. I am working of Android and till date I suspect that 2 problems occur due to cache coherency but don't have any proof to confirm the same.  So what I want is if exception occurs then I  copy the data of cache into RAM. By doing this I can check the data of cache with RAM and confirm whether it is because of cache coherency or any other reason. Here I am not sure about address range also. So can you suggest how to analyze such problems if we can't dump cache contents in RAM.

    Anshul

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  • 0 in reply to Peter Harris

    Hi Peter,

    Thanks a lot for your reply.

    As you know it's very hard to reproduce cache coherency problems. I am working of Android and till date I suspect that 2 problems occur due to cache coherency but don't have any proof to confirm the same.  So what I want is if exception occurs then I  copy the data of cache into RAM. By doing this I can check the data of cache with RAM and confirm whether it is because of cache coherency or any other reason. Here I am not sure about address range also. So can you suggest how to analyze such problems if we can't dump cache contents in RAM.

    Anshul

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