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ARM: 743626—An imprecise external abort, received while the  processor enters WFI, may cause a processor deadlock

Can someone explain more about this issue, and please provide the fix for this issue.

Parents
  • Source : Cortex-A9 Technical reference Manual(ARM)

    The micro TLB returns the physical address to the cache for the address comparison, and also checks the protection attributes to signal either a Prefetch Abort or a Data Abort. So signalling the prefetch Abort or a Data Abort should be disabled ?

Reply
  • Source : Cortex-A9 Technical reference Manual(ARM)

    The micro TLB returns the physical address to the cache for the address comparison, and also checks the protection attributes to signal either a Prefetch Abort or a Data Abort. So signalling the prefetch Abort or a Data Abort should be disabled ?

Children
  • As I said above, you should ensure that the protection attributes are configured so that any memory regions which are accessed for page table walks do not generate aborts. Typically, the page tables will be allocated and initialised during the OS start up sequence. However, the page tables are rarely static after OS initialization since they change constantly on events like context switches,. task creation/deletion etc.

    I think you need to take note of the fact that this particular erratum is classed as rare. No fix is planned because ARM does not believe that this has a significant impact on real, practical software systems. Software systems which exhibit the kind of behaviour described in the erratum would be flawed anyway. A correctly functioning operating system would never cause these conditions to occur.

    Chris


  • Thanks a lot Chris.

    Regards,

    Manyam

  • Hi Chris,

    Could you please help me how to configure the MMU settings to protect from external aborts.

    I'm unable to figure out the configurations settings/registers to be used using the MCR instruction for the coprocessor CP15.

  • Hi,

    Configuring the memory map to guard against external aborts is a little more involved than using a few MCR instructions, I'm afraid. To cover the memory map, you will need to generate and install a complete set of address translation tables (page tables) and then configure the MMU to use these when determining access rights for memory accesses.

    I think you should also note that, as has been said earlier, that this particular erratum is classes as "rare". As far as I can see, the Linux community has not seen fit to modify the Linux kernel to provide any fix or workaround to guard against it happening. Presumably, this is because they have taken the view that, in a correctly configured and functioning kernel, this situation will simply never arise!

    Do you have specific reasons for wanting to go further on this one?

    Chris