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Hi All,
Could anyone please tell me which generic register/location in memory can be used for storing a bit value which will not get reset after a CPU reset? I need the register to hold the value after a CPU reset so that I can know if a reset has happened successfully or not.
I am trying to use the SYS_NVFLAGSSET register. As I understand, this is a general purpose flag register. So I am trying to write certain value to it, which can be used later for checking. However, I am unable to write any value to it using the STR instruction. I understand that this register is at an address of 0x00000038. On checking the contents after writing, I see the default value of 0x00007F02 still loaded. (However, on researching I found this is a device specific register and may not be generic to ARM Cortex-M4 processors!)
Please let me know the correct register and if this approach is right or not.
My main purpose is that I want a value of 1 to be written to a register so that after a CPU soft-reset this value is retained and can be checked to see if the CPU has been resetted or not.
Thanks & Regards,
\Kashif
Message was edited by: Kashif Updated with newer inputs
Hi Kashif
Please give details of the hardware with which you're working - ARM core and board.
I thought we had covered this in your last question about CPU Reset during debug. Your software will know when the core has been reset because execution will continue from the reset handler. You are then free to store a flag anywhere in memory that is free *on your device*. Alternatively you could choose to use a register - it is entirely a software choice.
Regards
Jon
Does it have to be a register? Why can't you just assign a piece of memory?
Well not necessarily...A piece of memory as in SRAM? I would not do that because I would be writing to the entire SRAM; are you suggesting somewhere else as in the Flash memory etc?
Actually I was thinking you could use DRAM, but it doesn't really matter. Volatility is not an issue in this scenario.
Hi Jon,
Yes; but sadly I am unable to find such a "free" register on my device.
The device is TI Stellaris LM4F120 LaunchPad which uses a ARM Cortex-M4 core.
Thanks!
BR,
Sorry for my late reply.Anyways, I found this info which I think is what I was looking for in the first place.
reset cause register (RESC register). From the TRM (page 241 in Stellaris® LM4F120H5QR Microcontroller DATA SHEET): "This register is set with the reset cause after reset. The bits in this register are sticky and maintain their state across multiple reset sequences, except when an power-on reset is the cause, in which case, all bits other than POR in the RESC register are cleared." Bit-Field 4 should be set to 1 after a software reset happened.
So, how should I write about this? The problem is if I load the address of this RESC register into R11 (say), then it gets reset to Zero after the SW-reset happens. Also, do you think this address (0x400fe05c) is correct or is bit-banding required? This is the loop where the reset is happening.
Thanks!!
You are assuming that your loop will continue to execute after the reset. This is not the case. All core registers will be reset as defined in the TRM, and in particular your PC will be pointing to the reset handler. At this point you have exited the loop forever and cannot execute the branch to "main". You need to deal with this inside the reset handler and subsequent code.
Thanks. i got your point. I am working on it currently.
Could you let me know if there is any offset address calculation to be done for calculating the address of this system control register? As I read,(on page 225), the System control register base address is 0x400F.E000 and the offset for our RESC register is 0x05C. So the final address of our register would be 0x400F.E05C, right?
These details are manufacturer-specific, but I've checked the TI data-sheet and I agree, it looks as though the RESC register will be at 0x400FE05C.
Good luck!
Thanks for the confirmation. However, as per the documentation it says that the bit field 4 should be set to 1 after a S/W reset. However, I fail to see any change in the register values as shown in the snapshot.
Any ideas on this?
Try a memory read of 0x400FE05C using the debugger.