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Hi ,
The monitor debug mode can be configured in DSCR, which is writable via APB interface for am335x. But, I read the DRAR(MRC p14, 0, <Rd>, c1, c0, 0) and DSAR(MRC p14, 0, <Rd>, c2, c0, 0). Both of them are invalid value (both are 0).
My question is how to enable am335x Monitor debug-mode? Thanks a lot.
PS: I also ask the question at http://e2e.ti.com/support/arm/sitara_arm/f/791/p/334614/1167240.aspx#1167240
Thanks,
Pingchuan
Google results:
* The Device State Control Registers (DSCR) provide SoC level control over
* a number of peripherals. Details vary considerably among the various SoC
* parts. In general, the DSCR block will provide one or more configuration
* registers often protected by a lock register. One or more key values must
* be written to a lock register in order to unlock the configuration register.
* The configuration register may be used to enable (and disable in some
* cases) SoC pin drivers, peripheral clock sources (internal or pin), etc.
* In some cases, a configuration register is write once or the individual
* bits are write once. That is, you may be able to enable a device, but
* will not be able to disable it.
*
* In addition to device configuration, the DSCR block may provide registers
* which are used to reset SoC peripherals, provide device ID information,
* provide MAC addresses, and other miscellaneous functions.
Maybe you should unlock it firstly.
My suggestion:
ref to open jtag source package.
There is no this kind of register on am335x. Thanks all the same.