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Hi all,
ARMV8 has number of exception levels as EL0 , EL1, EL2, EL3 .. How this is managed and what is the exact use case of the same ?
Hi Chris,
Thanks for the reply.
This is applicable only for Cortex A alone or for both A & R series ?
It only really applies to Cortex-A at present.
- Most ARMv7-A processors (Cortex-A15, Cortex-A7 etc) support the four levels of privilege and the Virtualization Extensions. Sme of the earlier ones (e.g. Cortex-A9, Cortex-A5) do not support the Virtualization Extensions.
- ARMv7-R does not include the Virtualization Extensions so processors like Cortex-R4, Cortex-R5, Cortex-R7 do not support the extra privilege level.
- ARMv8-A includes everything I mentioned above (Cortex-A53, Cortex-A57 etc)
- The full details of ARMv8-R have not yet been released but we do know that it includes support for the Hypervisor Mode and the Virtualization Extensions allowing implementation of a full Type 1 Hypervisor.
Hope this helps.
Chris