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What's the Cortex-A12 Main Bus Interface?

Does Cortex-A12 not supprt AMBA4 ACE protocol?

The figure and description of the Cortex-A12 product page(http://www.arm.com/products/processors/cortex-a/cortex-a12-processor.php) shows as if it only supports "AMBA4 AXI Bus" is available bus interface.

Parents
  • Compared with AXI4, ACE protocol adds several singals and channels to maintain cache coherent. So it's useless for cache coherent to connect a AXI4 bus master with a cache coherent controller(CCI400). But you can use the ACP port of CA12 to maintain cache coherent.

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  • Compared with AXI4, ACE protocol adds several singals and channels to maintain cache coherent. So it's useless for cache coherent to connect a AXI4 bus master with a cache coherent controller(CCI400). But you can use the ACP port of CA12 to maintain cache coherent.

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