Hi all
i am new ARM processor. Can anyone explain clearly in simple terms what is Precise/Imprecise data abort in arm processor.?
Hi Rakesh,
Simply, a "precise" data abort is one for which it is possible to identify unambiguously the instruction which caused the aborting memory access. Correspondingly, an "imprecise" data abort is the opposite i.e. a data abort for which it is not possible to identify the instruction which caused the aborting access.
An example of an imprecise data abort might be a data write which goes through a write buffer. In such a case, the eventual write to memory may come many cycles after the STR instruction which placed the data in the write buffer. In this situation, it is not generally possible to work backwards to identity the instruction.
Another example would be a cache cast-out of dirty data. Again, if this causes an abort then it is not possible to identify the instruction which modified the data in t he cache at some previous time.
I hope this helps.
Chris
Thank you..,
We are facing Data abort - Asynchronous External abort type. Our understanding about Asynchronous External abort, The exception is not generated as a result of direct execution or attempted execution of instruction that caused the exception.
Following register dump are collected during Exception handling:
DFSR contains - 0x1406
Exception type bit[12] : External abort type
Fault status bit[10, 3:0] : 0b10110 - Asynchronous external abort
Over Asynchronous exception DFAR become UNKNOWN. So We expected AxFSR should help in this case. Unfortunately, In all the reproduction AxFSR shows ‘0’.
And Linker(lr) and Stack Pointer (sp) also points to be (very usual flow) normal SW execution.
Problem observed in R7 CPU.
Could you please provide technical advice to identify the source of exception.