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ACTLR[1] question in Cortex-A serias SOC

hi, experts:

I found ACTLR register definition is different between Cortex-A7 and Cortex-A9.

I have some questions about out cache concept in Cortex-A7.
1. Some program disable outer cache by setting ACTLR[1] = 0.

   So, is it only available with Cortex-A9?

   In Cortex-A7 MPCore manual: ACTLR[1] is reserved, so could not disablt outer cache by this method, right?

2. Outer cache question

   In Cortex-A7, L2 Cache controller is also integrated into SCU, so have not outer cache concept, right?

3. In Cortex-A7, SCTLR[2] used to control DCache enable or not.

    So, if wanting to disable DCache, just set SCTLR[2] = 0, not need to disable outer cache(such as L2 Cache) anymore, right?

4. In Cortex-A7, user could not only turn on L1 DCache, and disable L2 Cache, right?

    User must turn L1 DCache and L2 Cache at the same time.

    And if user set SCTLR[2] = 0, then he has disabled L1 DCache and L2 Cache at the same time, right?

best wishes,

Parents
  • Hi Peter,

    You are right that performance will suffer w/o L2 and that is exactly what I'm trying to measure - what is the impact of L2 on performance !

    Regarding the sleep on WFI - again even if one of the cores is sleeping, the other one would still send out cache coh messages so the performance will be different than if the hardware knew not to send out those transaction over SCU.

    So my end goal is to run a UP system w/o L2 caches and was wondering if we can do that on A7 at boot time.

    Thx,

    -Vineet

Reply
  • Hi Peter,

    You are right that performance will suffer w/o L2 and that is exactly what I'm trying to measure - what is the impact of L2 on performance !

    Regarding the sleep on WFI - again even if one of the cores is sleeping, the other one would still send out cache coh messages so the performance will be different than if the hardware knew not to send out those transaction over SCU.

    So my end goal is to run a UP system w/o L2 caches and was wondering if we can do that on A7 at boot time.

    Thx,

    -Vineet

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