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compile time constant expressions

Mike Rieker
Note: This was originally posted on 12th March 2009 at http://forums.arm.com

I am seeing code like this generated from the armcc v4.0 compiler (just downloaded it a couple hours ago):

  MOV r0,#5
  CLZ r0,r0
  RSB r7,r0,#0x3f

So I would think the compiler would know that R7 has 34 in it or whatever.  It isn't so bad these three instructions, it's just that in this case the code goes on to divide by the r7 value and so generates a call to __aeabi_uldivmod whereas I was expecting the compiler to generate a UMULL or something like that.

Is there some command-line optimization option I can use to fix this?  I am using this command line:

  armcc --cpu=ARM926EJ-S --inline -Otime -O3 -S -o test.s test.c

Thanks!
Mike
  • 0
    Note: This was originally posted on 12th March 2009 at http://forums.arm.com

    Interestingly inefficient. Curious to know: what source led to this output?
  • 0
    Note: This was originally posted on 13th March 2009 at http://forums.arm.com

    Hi,

    In case of these three instuctions , compiler should not be calling any devide function.
    BYW CLZ is ARM assembly insturction.

    regards,
    Jameer


    There isn't a count leading zero construct in the C language, so presumably it's something like:

    [font="Courier New"]int func(void)
    {
      return 63 - __clz(5);
    }[/font]

    Using RVCTs __clz() instrinsic.

    hth
    s.
  • 0 Arm Employee Badge
    Note: This was originally posted on 14th March 2009 at http://forums.arm.com

    In case of these three instuctions , compiler should not be calling any devide function.

    Correct, however, the OP stated that the reason why the code was doubly inefficient was because the result was being passed onto a divide operation that could presumably also just have been optimised to a constant assignment. My example was just to generate the CLZ instruction containing assembly sequence posted.

    BYW CLZ is ARM assembly insturction.

    Correct, the __clz() intrinsic provides a way of generating this instruction from C code, or an equivalent assembly sequence for processors not implementing CLZ, e.g. ARM7TDMI.

    s.
  • +1 Arm Employee Badge
    Note: This was originally posted on 13th March 2009 at http://forums.arm.com

    There isn't a count leading zero construct in the C language, so presumably it's something like:

    [font="Courier New"]int func(void)
    {
      return 63 - __clz(5);
    }[/font]

    Using RVCTs __clz() instrinsic.

    hth
    s.