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Cortex A8 Problem with RVDS or ARM GCC?

Note: This was originally posted on 4th March 2009 at http://forums.arm.com

Hi All,

          My application is not running in ARM Cortex A8. But same application is working in ARM9e. I have compiled using --cpu=cortex-a8 or --cpu = 7-a. Is their any specific options i have to give.

          Currently i am using RVDS4.0. And also i have tried in Code Sourcery(ARM GCC). Their also i am facing the same problem.

          Can any one please help me solve this issue.

Best Regards,
Ranjith Kumar
(09008787862).
  • Note: This was originally posted on 23rd March 2009 at http://forums.arm.com

    Hi Thanks for ur reply,

       Not only my application, Even a hello world program is also going infinite loop in RVDS 4.0 ?? Can please help me to solve this one..


    Regards,
    Ranjith.


    Ranjith,

    If your application makes no use of assembly or intrinsics, then the likely answer is that your code is producing unaligned memory traffic. On an ARM9 these will simply result in the read value being rotated, whilst if unaligned accesses have not been enabled (or the MMU not enabled) on the Cortex-A8 these will produce exceptions.

    hth
    s.
  • Note: This was originally posted on 23rd March 2009 at http://forums.arm.com

    Is the memory map you are giving the linker correct?

    Are you using any CP15 operations - such as MMU and cache maintenance? These have probably changed.

    Can you connect a debugger and tell us actually what is going wrong? Diagnosing "stuck in a loop" is impossible because it could be anything really... Information such as whether it is a data abort / prefetch abort / what instruction is faulting would be useful - etc...
  • Note: This was originally posted on 4th March 2009 at http://forums.arm.com

    Ranjith,

    If your application makes no use of assembly or intrinsics, then the likely answer is that your code is producing unaligned memory traffic. On an ARM9 these will simply result in the read value being rotated, whilst if unaligned accesses have not been enabled (or the MMU not enabled) on the Cortex-A8 these will produce exceptions.

    hth
    s.