This discussion has been locked.
You can no longer post new replies to this discussion. If you have a question you can start a new discussion

ARM1176JZ-S, cache confg: effective cache size calculation

Note: This was originally posted on 22nd February 2009 at http://forums.arm.com

Hello,

1) I am using ARM1176JZ-S core with WinCE Platform. The cache memory is configured as follows

    DCache: 128 sets, 4 ways, 32 line size, 16384 size
    ICache: 128 sets, 4 ways, 32 line size, 16384 size

    Now I want to know the effective data cache size, I mean the total data from the main memory 
    could be cached and accessed without cache trashing within a function.

2) Is the cache set size(128 sets) and cache block/segment(of other processors) size are same?

Kindly reply this mail, thanks in advance

Regards,
Deven
Parents
  • Note: This was originally posted on 11th March 2009 at http://forums.arm.com

    Hello isogen74 & tum,

    Thanks for the information.

    I have one more question.

    Does the first memory access immediately after the cache flush shall consume less cycles than memory access at cache with some entry. (Assume both are cache hit condition)

    I am doing a code optimization. In any-case cache flush before the algorithm execution benefit the algorithm performance compare to with-out cache flush.


    In other way, the pseudo-random/round-robin cache line selection and fill have any effect of cache flush before the operation.


    Kindly clarify.

    Thanks,
    Deven
Reply
  • Note: This was originally posted on 11th March 2009 at http://forums.arm.com

    Hello isogen74 & tum,

    Thanks for the information.

    I have one more question.

    Does the first memory access immediately after the cache flush shall consume less cycles than memory access at cache with some entry. (Assume both are cache hit condition)

    I am doing a code optimization. In any-case cache flush before the algorithm execution benefit the algorithm performance compare to with-out cache flush.


    In other way, the pseudo-random/round-robin cache line selection and fill have any effect of cache flush before the operation.


    Kindly clarify.

    Thanks,
    Deven
Children
No data