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hard fault with Cortex M1

sumit sumit
Note: This was originally posted on 24th December 2008 at http://forums.arm.com

Hi all,

I am developing firmware on Cortex M1 on Actel fusion FPGA.I have built the design that has sram at 0x0 location ,size is 1mb and I use it as my program memory.I have Ethernet interface and I want to debug the driver for the ipcore.

I am facing the problem due to hard fault.When I start the transmission on the Ethernet,after transmission first frame the cortex goes to hard fault.

Would anyone tell me  what may be the reason for hard fault? How to overcome?

I am completely new to arm environment.

regards,
Sumit
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    Note: This was originally posted on 8th January 2009 at http://forums.arm.com

    Would it be an exception handler corrupted the stacked memory, and hence affect the register's content after exception return?  When the interrupt program is resumed after the interrupt handler, the memory pointer became invalid and might cause unaligned transfer.  You can try setup some variables to trace what exception handlers has been running before the fault, and see if the exception handler has any operations that can corrupt the stack (e.g. data array in local variables with unbounded index).
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  • 0
    Note: This was originally posted on 8th January 2009 at http://forums.arm.com

    Would it be an exception handler corrupted the stacked memory, and hence affect the register's content after exception return?  When the interrupt program is resumed after the interrupt handler, the memory pointer became invalid and might cause unaligned transfer.  You can try setup some variables to trace what exception handlers has been running before the fault, and see if the exception handler has any operations that can corrupt the stack (e.g. data array in local variables with unbounded index).
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