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hard fault with Cortex M1

sumit sumit
Note: This was originally posted on 24th December 2008 at http://forums.arm.com

Hi all,

I am developing firmware on Cortex M1 on Actel fusion FPGA.I have built the design that has sram at 0x0 location ,size is 1mb and I use it as my program memory.I have Ethernet interface and I want to debug the driver for the ipcore.

I am facing the problem due to hard fault.When I start the transmission on the Ethernet,after transmission first frame the cortex goes to hard fault.

Would anyone tell me  what may be the reason for hard fault? How to overcome?

I am completely new to arm environment.

regards,
Sumit
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  • 0
    Note: This was originally posted on 24th December 2008 at http://forums.arm.com

    Thanks a lot sim,

    I think mine has the problem of misaligned memory access or dereferencing of pointer.My code is completely written in C and I build on SoftConsole Ide of Actel.Code is heavily using pointer so I will check that.

    I modified the access of pointer to write the register and it started working in debug mode.It works only when I do single stepping but not in run mode.

    Is there anything that forces the code to run under debug?

    regards,
    Sumit
Reply
  • 0
    Note: This was originally posted on 24th December 2008 at http://forums.arm.com

    Thanks a lot sim,

    I think mine has the problem of misaligned memory access or dereferencing of pointer.My code is completely written in C and I build on SoftConsole Ide of Actel.Code is heavily using pointer so I will check that.

    I modified the access of pointer to write the register and it started working in debug mode.It works only when I do single stepping but not in run mode.

    Is there anything that forces the code to run under debug?

    regards,
    Sumit
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