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Loading instruction set

Note: This was originally posted on 7th October 2008 at http://forums.arm.com

HI,
I am trying out the Cortex M1 on an altera FPGA. I have an example implementation from the Altera kit which uses ITCM to load the software files on the ARM. I want to instead load the software from external Flash or SRAM. I have made the required hardware and software changes and when I single step the system in emulation mode, it runs a few lines and jumps to 0xfffffffe, which is a hard fault location. The flash is off-chip and sitting on a tri-state bridge, the address location for the flash starts at 0x0 and the size is 0x1000000, so I know that flash is within the first 0.5GB of ARM's address space. Any suggestions why the arm is hitting hard fault.

Thank You
Chaitanya

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0 Simon Craske over 12 years ago

Note: This was originally posted on 7th October 2008 at http://forums.arm.com

Chaitanya,

Assuming that the flash is correctly integrated, a common software fault that results in hardfault being entered almost immediately is not having the LSB of the second word set, i.e. the LSB of the reset vector must be one.

hth
s.
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0 Simon Craske over 12 years ago

Note: This was originally posted on 7th October 2008 at http://forums.arm.com

Chaitanya,

Assuming that the flash is correctly integrated, a common software fault that results in hardfault being entered almost immediately is not having the LSB of the second word set, i.e. the LSB of the reset vector must be one.

hth
s.
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